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SRAM Design Engineer - ( 5 yrs to 15 yrs )

30+ days ago 2026/05/21
Other Business Support Services
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Job description

Position Summary




• SRAM design group in bangalore developes various types of SRAMs , Registerfiles and ROMis in advanced technology nodes like 4nm, 2nm and beyond. The team is responsible for delivering highly competitive memories for the SAMSUNG Foundry customers. Provides an unique opportunity to the individuals, who are willing innovate and solve the most challenging problem in the field of circuit design. Samsung Foundry being a pioneer in new device technology, it creates ample opportunities to the circuit designer to innovate and design highly competitive IPs.

Role and Responsibilities




  • Design highly competetive circuits to meet peroformance/power specificiations requested by customers
  • Guide and lead a group of engineers to deliver the SRAM IP in the given timelines
  • Analyse circuits and indentify potential robustness gaps and find solutions to improve robustness of the design.
  • Own the responsibility from SPEC to GDS and DK delivery.
  • Review circuits, robustness reports and identify potential robustness issues.
  • Review Layouts and suggest improvement areas to achieve competitive PPA
  • Understanding of SRAM PPA trade-offs and identify right techniques to meet SPEC
  • Must be able to communicate effectively across different teams.

Skills and Qualifications




  • Master/Bachelor in electronics
  • Working experience (10+years) in preferably Memory design
  • Understanding of RC network and finfet fundamentals are necessary.
  • Custom or Compiler SRAM/ROM development experience
  • Fundamentals of process variability and its effect on memory design
  • Thorough understanding of SRAM bit cell and its characteristics (Read current, Standby current, data retention, SNM)
  • Stong understanding of circuit design fundamentals
  • Critical path modeling concept, various type of models ( RC, C, Pai, ladder)
  • Good knowledge of semiconductor physics. Like knowledge of finfet function, parasitics etc
  • Analysing layout and understanding of LLE effects.
  • Bachelor's /Master degree in Computer Science, Electrical/Electronics Engineering, Engineering and 10+ years of experience in circuit design.






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